CPU feature flags: Difference between revisions
>Samthecrazyman Added more terms, small format changes |
Added AVX and AVX512, added codenames |
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| APIC | | APIC | ||
| Advanced Programmable Interrupt Controller. | | Advanced Programmable Interrupt Controller. | ||
|- | |||
| AVX | |||
| Advanced Vector Extensions (''Gesher New Instructions''/''Sandy Bridge New Instructions'') - vector instructions based on 256-bit registers. | |||
|- | |||
| AVX2 | |||
| Advanced Vector Extensions 2 (''Haswell New Instructions'') - vector instructions based on 256-bit registers. | |||
|- | |||
| AVX512 | |||
| Advanced Vector Extensions 512 - vector instructions based on 512-bit registers. | |||
|- | |- | ||
| CLFSH/CLFlush | | CLFSH/CLFlush | ||
| Line 28: | Line 37: | ||
|- | |- | ||
| CR8Legacy | | CR8Legacy | ||
| | | CR8 in 32-bit mode. | ||
|- | |- | ||
| CX8 | | CX8 | ||
| Line 64: | Line 73: | ||
|- | |- | ||
| FXSR_OPT | | FXSR_OPT | ||
| | | FXSR optimisations. | ||
|- | |- | ||
| HT | | HT | ||
| Line 211: | Line 220: | ||
| VPID | | VPID | ||
| Virtual Processor ID (for virtualization). | | Virtual Processor ID (for virtualization). | ||
|- | |||
| x2APIC | |||
| New APIC controller introduced with the Nehalam architecture | |||
|- | |- | ||
| XTPR | | XTPR | ||
| TPR register chipset update control messenger. Part of the APIC code | | TPR register chipset update control messenger. Part of the APIC code | ||
|} | |} | ||